In general, there are two main rules for laminated design:
Each routing layer must have an adjacent reference layer (power source or formation);
The adjacent main power layer and formation should be kept at a minimum spacing to provide a large coupling capacitance
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The following is an example of a stack from two to eight layers:
A single-sided PCB board and double-sided PCB board laminated
For the two-layer board, because the number of layers is small, there is no lamination problem. EMI radiation control is mainly considered from the wiring and layout;
The EMC problem of single-layer and double-layer plates is more and more prominent. The main reason for this phenomenon is that the area of the signal loop is too large, which not only produces strong electromagnetic radiation but also makes the circuit sensitive to external interference. The simplest way to improve the EMC of a line is to reduce the loop area of a critical signal.
Critical signals: From the perspective of electromagnetic compatibility, critical signals mainly refer to those that produce strong radiation and those that are sensitive to the outside world. The signals that can produce strong radiation are usually periodic signals, such as the low signal of a clock or address. Interference-sensitive signals are those with low analog levels.
Single and double-layer plates are usually used in low-frequency simulation designs below 10KHz:
1) Route the power cables on the same layer in a radial manner, and minimize the total length of the lines;
2) When walking the power supply and ground wire, close to each other; Lay a ground cable near the key signal cable. The ground cable should be as close as possible to the signal cable. In this way, a smaller loop area is formed and the sensitivity of differential mode radiation to external interference is reduced. When a ground wire is added to the side of the signal wire, a loop with the smallest area is formed, and the signal current is sure to go through this loop, rather than the other ground path.
If it is a double-layer circuit board, it can be on the other side of the circuit board, close to the signal line below, along the signal line cloth a ground wire, a line as wide as possible. The resulting circuit area is equal to the thickness of the circuit board multiplied by the length of the signal line.
Two, or four layers of the laminated board
1. SIG-GND(PWR)-PWR (GND) -sig;
2. Gnd-sig (PWR)-SIG(PWR)-GND;
The potential problem with both of these laminated designs is the traditional 1.6mm (62mil) plate thickness. The layer spacing will become large, not only conducive to control impedance, interlayer coupling, and shielding; In particular, the large spacing between the power supply strata reduces the plate capacitance and is not conducive to noise filtering.
The first scheme is usually applied when there are many chips on the board. This scheme can obtain better SI performance, but EMI performance is not so good, which is mainly controlled by wiring and other details. Main attention: the stratum is placed in the connection layer of the densest signal layer, which is conducive to the absorption and suppression of radiation; Increase the plate area to reflect the 20H rule.
For the second scheme, it is usually used where the chip density on the board is low enough and there is the sufficient area around the chip to place the required power supply copper coating. In this scheme, the outer layer of the PCB is the layer, and the middle two layers are the signal/power layer. The power supply on the signal layer is routed with a wide line, which can make the path impedance of the power supply current low, the impedance of the signal microstrip path is also low, and the inner signal radiation can be shielded through the outer layer. From an EMI control point of view, this is the best 4-layer PCB structure available.
Main attention: the middle two layers of signal and power mixing layer spacing should be opened, the direction of the cable is vertical, avoid crosstalk; Appropriate control panel area, reflecting the 20H rule; If the impedance is to be controlled, the above solution should be very carefully placed under the copper islands of the power supply and ground. In addition, the power supply or layering copper should be interconnected as much as possible to ensure DC and low-frequency connectivity.
3. The stacking of six layers of plates
For the design of high chip density and high clock frequency, the design of a 6-layer board should be considered.
1. The SIG - GND - SIG - PWRS - GND - SIG.
For this scheme, the lamination scheme can achieve better signal integrity, the signal layer is adjacent to the ground layer, the power layer is paired with the ground layer, the impedance of each line layer can be well controlled, and both layers are good at absorbing magnetic field lines. In addition, it can provide a better return path for each signal layer under the condition of complete power supply and formation.
2. GND-SIG-GND-PWR-SIG-GND;
For this scheme, this scheme is only applicable when the device density is not very high. This layer has all the advantages of the upper layer, and the ground plane of the top and the bottom layer is relatively complete, which can be used as a good shielding layer. It should be noted that the power layer should be near the layer that is not the main component plane because the bottom plane will be more complete. Therefore, EMI performance is better than the first scheme.
Conclusion: For the six-layer scheme, the spacing between the power layer and the ground should be minimized to obtain a good coupling between power and ground. However, although the plate thickness of 62mil and the spacing between layers are reduced, it is still difficult to control the spacing between the main power supply and the ground layer very small. Compared with the first scheme and the second scheme, the cost of the second scheme is greatly increased. Therefore, we usually choose the first option when we stack. During design, follow the 20H rule and the mirror layer rule
4. eight layers of the laminated board
- due to the poor electromagnetic absorption capacity and large power impedance, this is not a good way to stack. Its structure is as follows:
1. Signal 1 component surface, the microstrip wiring layer
2. Signal 2 internal microstrip wiring layer, good wiring layer (X direction)
3. Ground
4. Signal 3 Strip line routing layer, good routing layer (Y direction)
5. Signal 4 Cable routing layer
6. Power
7. Internal microstrip wiring layer of Signal 5
Signal 6 Microstrip wiring layer
- It is a variant of the third laminated mode. Due to the addition of the reference layer, it has better EMI performance, and the characteristic impedance of each signal layer can be well controlled
1.Signal 1 component surface, a microstrip wiring layer, the good wiring layer
2.Ground stratum, good electromagnetic wave absorption ability
3.Signal 2 Cable routing layer. The good cable routing layer
4.Power supply layer and the underlying strata constitute excellent electromagnetic absorption 5.Ground stratum
6.Signal 3 Cable routing layer. The good cable routing layer
7.Power formation, with large power impedance
8.Signal 4 Microstrip cable layer, good cable layer
- the best stacking mode, because the use of a multi-layer ground reference plane has very good geomagnetic absorption capacity.
1.Signal 1 component surface, a microstrip wiring layer, the good wiring layer
2.Ground stratum, good electromagnetic wave absorption ability
3.Signal 2 Cable routing layer. Good cable routing layer
4.Power supply layer and the underlying strata constitute excellent electromagnetic absorption 5.Ground stratum
6.Signal 3 Cable routing layer. The good cable routing layer
7.Ground stratum, better electromagnetic wave absorption capacity
Signal 4 Microstrip cable layer, good cable layer
How to choose how many layers to use and how to use the layers depends on the number of signal networks on the board, device density, PIN density, signal frequency, the size of the board, and many other factors. We need to take these factors into consideration. The more the number of signal networks, the higher the density of the device, the higher the PIN density, and the higher the frequency of the signal design should be adopted as far as possible. For good EMI performance, it is best to ensure that each signal layer has its own reference layer.
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